Energy transfer circuit, and electricity storage system

ABSTRACT

Cell selection circuit is provided between n cells connected in series, where n is an integer of 2 or more, and inductor, and is provided at both ends of the selected cell and both ends of inductor can be conductive. Clamp circuit includes at least one clamp switch for forming a closed loop including inductor in a state where cell selection circuit does not select any cells. Current detection circuit detects the value of the current flowing through inductor. Low-pass filter band-limits the detection value. Overcurrent detection circuit activates the protection of inductor when the band-limited detection value exceeds the threshold.

TECHNICAL FIELD

The present invention relates to an energy transfer circuit and a powerstorage system that transfers energy between a plurality of cells ormodules connected in series.

BACKGROUND ART

In recent years, secondary batteries such as lithium-ion batteries andnickel-metal-hydride batteries have been used for various purposes. Thesecondary batteries are each used for an in-vehicle (including anelectric bicycle) application for supply of electric power to a drivemotor of an electric vehicle (EV), a hybrid electric vehicle (HEV), or aplug-in hybrid vehicle (PHV), for power storage for a peak shift or abackup, and for frequency regulation (FR) for stabilizing a frequency ofa system, for example.

Generally, the secondary battery such as the lithium-ion batteryexecutes an equalizing process for equalizing capacities between aplurality of cells connected in series from the viewpoint of maintainingpower efficiency and ensuring safety. The equalizing process includes apassive method and an active method. The passive method is a method forequalizing capacities of a plurality of cells connected in series byconnecting a discharge resistor to each of the plurality of cells, anddischarging the other cells so as to match the voltages of the othercells with a voltage of a cell having the lowest voltage. The activemethod is a method for equalizing capacities of a plurality of cellsconnected in series by transferring energy between the plurality ofcells. Although the active method has less power loss than the passivemethod and can reduce a heat generation amount, the passive method witha simple circuit configuration at low cost is currently the mainstream.

In recent years, a battery pack has been increased in energy capacityand output, especially in in-vehicle applications. That is, the capacityof each cell in the battery pack and the number of series connections ofcells are increasing. This causes an imbalance of an energy amountbetween the plurality of cells to increase. Therefore, the equalizingprocess also increases a time required to eliminate the imbalancebetween the plurality of cells.

In contrast, reduction in time required for the equalizing process isrequired especially in the in-vehicle applications. In order toeliminate a large energy imbalance in a short time, it is necessary toapply a large current for equalization. The passive method eliminates animbalance of energy by consuming a capacity of a cell having a highvoltage using a resistor, so that increase in amount of current flowinginto the resistor increases a heat generation amount. As the number ofseries connections of cells increases as described above, a heatdissipation area for heat generated in the resistor is less likely to besecured on a substrate.

This increases need for the active method in which energy is transferredto a cell having a small capacity instead of converting the energy intoheat to consume the energy. As a configuration of an active equalizingcircuit, there is a configuration in which an inductor is connectedbetween the midpoint of two cells and the midpoint of two switchesconnected in parallel to the two cells (see, for example, PTL 1).

CITATION LIST Patent Literature

-   PTL 1: Unexamined Japanese Patent Publication No. 7-322516

SUMMARY OF THE INVENTION Technical Problem

In an active equalizing circuit using an inductor, it is necessary toprovide an overcurrent protection circuit in order to prevent theinductor from saturating. The high frequency noise associated withswitching is superimposed on the detection waveform of the currentflowing through the inductor. In order to suppress this high frequencynoise, it is conceivable to install a low-pass filter in front of theovercurrent detection circuit.

In the overcurrent protection circuit of the active type equalizingcircuit described above, it is necessary to capture the peak currentvalue at the moment when the inductor current switches from rising tofalling, but due to the influence of the low-pass filter, it isdifficult to capture the true peak current value.

Further, in order to prevent the false detection of the overcurrentprotection circuit due to a high frequency noise, it is necessary todesign a large time constant of the low-pass filter and a low thresholdfor overcurrent detection. In this case, the performance of the inductorcannot be fully utilized. The margin is excessively designed withrespect to the range of normal operation, and a large waste is generatedin the circuit scale and cost.

The present disclosure has been made in view of these circumstances, andan object of the present invention is to provide a technique forachieving highly accurate overcurrent protection at an appropriatecircuit scale and cost in an energy transfer circuit including aninductor.

Solution to Problem

In order to solve the above problems, an energy transfer circuit of anaspect of the present disclosure includes an inductor, a cell selectioncircuit provided between n cells connected in series, where n is aninteger of 2 or more, and the inductor and capable of conducting bothends of a selected cell including any one of the n cells or a pluralityof cells connected in series, and both ends of the inductor, a clampcircuit having at least one clamp switch for forming a closed loopincluding the inductor with the cell selection circuit not selecting anycells, a current detection circuit configured to detect a value of acurrent flowing through the inductor, a low-pass filter configured toband-limit a detection value detected by the current detection circuit,and an overcurrent detection circuit configured to activate protectionof the inductor when a detection value band-limited by the low-passfilter exceeds a threshold.

Advantageous Effect of Invention

According to the present disclosure, in an energy transfer circuitincluding an inductor, highly accurate overcurrent protection can beachieved at an appropriate circuit scale and cost.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a diagram showing a configuration example 1 of a power storagesystem according to a first exemplary embodiment.

FIG. 2 is a diagram showing a configuration example 2 of the powerstorage system according to the first exemplary embodiment.

FIG. 3(a) to FIG. 3(h) are circuit diagrams for explaining a basicoperation sequence example of an equalizing process of the power storagesystem according to the first exemplary embodiment.

FIG. 4(a) to FIG. 4(c) are diagrams for explaining a specific example ofthe equalizing process of the power storage system according to thefirst exemplary embodiment.

FIG. 5 is a diagram showing a configuration example 1 of a power storagesystem according to a second exemplary embodiment.

FIG. 6 is a diagram showing a configuration example 2 of the powerstorage system according to the second exemplary embodiment.

FIG. 7 is a diagram illustrating a configuration example of a powerstorage system according to a comparative example.

FIG. 8(a) to FIG. 8(h) are diagrams in which a schematic waveform of aninductor current input to the overcurrent detection circuit according tothe comparative example, and a schematic waveform of an inductor currentinput to the overcurrent detection circuit according to the firstexemplary embodiment and the second exemplary embodiment are compared.

FIG. 9(a) to FIG. 9(c) are diagrams showing an example of a detectionwaveform of an inductor current according to the comparative example.

FIG. 10(a) to FIG. 10(c) are diagrams showing an example of a detectionwaveform of an inductor current according to the first exemplaryembodiment and the second exemplary embodiment.

FIG. 11(a) to FIG. 11(b) are diagrams showing a detection waveform of aninductor current that has not passed through the low-pass filter and adetection waveform of an inductor current that has passed through thelow-pass filter with the cutoff frequency set to 20 MHz.

FIG. 12(a) to FIG. 12(b) are diagrams showing a detection waveform of aninductor current that passed through the low-pass filter with the cutofffrequency set to 8 MHz and a detection waveform of an inductor currentthat passed through the low-pass filter with the cutoff frequency set to4 MHz.

FIG. 13(a) to FIG. 13(b) are diagrams showing a detection waveform of aninductor current that passed through the low-pass filter with the cutofffrequency set to 2 MHz and a detection waveform of an inductor currentthat passed through the low-pass filter with the cutoff frequency set to1 MHz.

FIG. 14 is a diagram showing a detection waveform of an inductor currentthat has passed through low-pass filter 15 with the cutoff frequency setto 0.5 MHz.

FIG. 15(a) to FIG. 15(b) are diagrams showing a detection waveform of aringing noise that has not passed through the low-pass filter and adetection waveform of a ringing noise that has passed through thelow-pass filter with the cutoff frequency set to 20 MHz.

FIG. 16(a) to FIG. 16(b) are diagrams showing a detection waveform of aringing noise that passed through the low-pass filter with the cutofffrequency set to 2 MHz and a detection waveform of a ringing noise thatpassed through the low-pass filter with the cutoff frequency set to 1MHz.

FIG. 17(a) to FIG. 17(b) are diagrams showing a detection waveform of aringing noise that passed through the low-pass filter with the cutofffrequency set to 0.5 MHz and a detection waveform of a ringing noisethat passed through the low-pass filter with the cutoff frequency set to0.25 MHz.

FIG. 18 is a diagram showing a detection waveform of a ringing noisethat has passed through the low-pass filter with the cutoff frequencyset to 0.125 MHz.

FIG. 19 is a diagram showing a configuration of a power storage systemaccording to a third exemplary embodiment.

DESCRIPTION OF EMBODIMENTS

FIG. 1 is a diagram showing a configuration example 1 of power storagesystem 1 according to a first exemplary embodiment. Power storage system1 includes equalizing circuit 10 and power storage 20. Power storage 20includes n cells connected in series, where n is an integer of 2 ormore. FIG. 1 illustrates an example in which four cells C1 to C4 areconnected in series. A number of cells connected in series variesaccording to voltage specifications required for power storage system 1.

For each cell, a rechargeable power storage element such as alithium-ion battery cell, a nickel-metal-hydride battery cell, a leadbattery cell, an electric double layer capacitor cell, and a lithium-ioncapacitor cell is available. Hereinafter, in the present specification,an example using a lithium-ion battery cell (having nominal voltage of3.6 V to 3.7 V) is assumed.

Equalizing circuit 10 includes voltage detector 14, cell selectioncircuit 11, energy retaining circuit 12, controller 13, and anovercurrent protection unit. Voltage detector 14 detects a voltage ofeach of n (four in FIG. 1) cells connected in series. Specifically,voltage detector 14 is connected to nodes of n cells connected in seriesby (n+1) voltage lines, and detects a voltage between two adjacentvoltage lines, thereby detecting a voltage of each cell. Voltagedetector 14 can be configured with, for example, a general-purposeanalog front-end integrated circuit (IC) or an application specificintegrated circuit (ASIC). Voltage detector 14 converts the detectedvoltage of each of the cells into a digital value to output it tocontroller 13.

Cell selection circuit 11 is a circuit provided between the n cellsconnected in series and inductor L1 included in energy retaining circuit12, and capable of electrically connecting both ends of a cell selectedfrom among the n cells to both ends of inductor L1. Cell selectioncircuit 11 includes first wiring W1 connected to a first end of inductorL1, second wiring W2 connected to a second end of inductor L1, aplurality of first wiring side switches, and at least one second wiringside switch.

The plurality of first wiring side switches is connected betweenodd-numbered nodes and first wiring W1 among (n+1) nodes of the n cellsconnected in series. At least one second wiring side switch is connectedbetween even-numbered nodes and second wiring W2 among the (n+1) nodesof the n cells connected in series.

In the example shown in FIG. 1, n=4 and the number of nodes=5 aresatisfied, and cell selection circuit 11 has three first wiring sideswitches and two second wiring side switches. In FIG. 1, first switchS1, fifth switch S5, and ninth switch S9 are the first wiring sideswitches, and fourth switch S4 and eighth switch S8 are the secondwiring side switches.

Energy retaining circuit 12 (also referred to as a clamp circuit)includes inductor L1, first clamp switch Sc1, second clamp switch Sc2,third clamp switch Sc3, and fourth clamp switch Sc4. First clamp switchSc1, second clamp switch Sc2, third clamp switch Sc3, and fourth clampswitch Sc4 form a full bridge circuit. Specifically, a first arm inwhich first clamp switch Sc1 and second clamp switch Sc2 are connectedin series, and a second arm in which third clamp switch Sc3 and fourthclamp switch Sc4 are connected in series are connected in parallelbetween first wiring W1 and second wiring W2. Inductor L1 is connectedbetween a node between first clamp switch Sc1 and second clamp switchSc2 and a node between third clamp switch Sc3 and fourth clamp switchSc4.

First clamp switch Sc1 to fourth clamp switch Sc4 can electricallyconnect both the ends of inductor L1 in energy retaining circuit 12.Specifically, in a state where cell selection circuit 11 does not selectany cells, first clamp switch Sc1 and third clamp switch Sc3 arecontrolled to a conducting state, and second clamp switch Sc2 and fourthclamp switch Sc4 are controlled to a non-conducting state, or firstclamp switch Sc1 and third clamp switch Sc3 are controlled to anon-conducting state, and second clamp switch Sc2 and fourth clampswitch Sc4 are controlled to a conducting state, and thereby a closedloop including inductor L1 can be formed in energy retaining circuit 12.

First clamp switch Sc1 to fourth clamp switch Sc4 can switch a directionof a current flowing to inductor L1. Specifically, in a state where cellselection circuit 11 selects any cell, first clamp switch Sc1 and fourthclamp switch Sc4 are controlled to a conducting state, and second clampswitch Sc2 and third clamp switch Sc3 are controlled to a non-conductingstate, or first clamp switch Sc1 and fourth clamp switch Sc4 arecontrolled to a non-conducting state, and second clamp switch Sc2 andthird clamp switch Sc3 are controlled to a conducting state, and therebythe direction of the current flowing to inductor L1 can be switched.

Controller 13 executes an equalizing process on the n cells connected inseries based on the voltage of each of then cells detected by voltagedetector 14. Controller 13 can be, for example, a microcomputer.Controller 13 and voltage detector 14 may be formed integrated into onechip.

In the present exemplary embodiment, controller 13 executes anequalizing process on the n cells connected in series by an active cellbalance method. In the active cell balance method according to thepresent exemplary embodiment, energy is transferred from one cell (cellto be discharged) to another cell (cell to be charged) between the ncells connected in series to equalize capacities of one cell and theother cell. Repeating this energy transfer equalizes capacities of the ncells connected in series.

First, controller 13 controls first clamp switch Sc1 and fourth clampswitch Sc4 to a conducting state and second clamp switch Sc2 and thirdclamp switch Sc3 to a non-conducting state, or controls first clampswitch Sc1 and fourth clamp switch Sc4 to a non-conducting state andsecond clamp switch Sc2 and third clamp switch Sc3 to a conductingstate, and controls cell selection circuit 11 to electrically connectboth ends of the cell to be discharged among the n cells and both theends of inductor L1 for a predetermined time to create a discharge path.In a state where the discharge path is created, a current flows betweenthe cell to be discharged and inductor L1, and a state where a currentflows from the cell to be discharged to inductor L1 (also referred to asan inductor increase state) occurs, and energy is stored in inductor L1.

Subsequently, controller 13 controls cell selection circuit 11 toelectrically shut off the n cells and inductor L1, and controls firstclamp switch Sc1 and third clamp switch Sc3 to a conducting state, andsecond clamp switch Sc2 and fourth clamp switch Sc4 to a non-conductingstate, or controls first clamp switch Sc1 and third clamp switch Sc3 toa non-conducting state, and second clamp switch Sc2 and fourth clampswitch Sc4 to a conducting state to create a clamp path. In this clampstate, a circulating current flows through the closed loop, and aninductor current is actively clamped in energy retaining circuit 12.

Subsequently, controller 13 controls first clamp switch Sc1 and fourthclamp switch Sc4 to a conducting state, and second clamp switch Sc2 andthird clamp switch Sc3 to a non-conducting state, or controls firstclamp switch Sc1 and fourth clamp switch Sc4 to a non-conducting state,and second clamp switch Sc2 and third clamp switch Sc3 to a conductingstate, and controls cell selection circuit 11 to electrically connectboth ends of the cell to be charged among the n cells and both the endsof inductor L1 for a predetermined time to create a charge path. In astate where the charge path is created, a current flows between the cellto be charged and inductor L1, and a state where an inductor currentactively clamped in energy retaining circuit 12 flows in the cell to becharged (also referred to as an inductor current reduction state)occurs. Accordingly, the energy transfer from one cell to another iscompleted.

Equalizing circuit 10 includes shunt resistor Rs, differential amplifierAP1, low-pass filter 15, and overcurrent detection circuit 16 asconfiguration elements of the overcurrent protection unit. Shuntresistor Rs is connected in series with inductor L1. Differentialamplifier AP1 amplifies the voltage across shunt resistor Rs to outputit to low-pass filter 15. Shunt resistor Rs and differential amplifierAP1 function as a current detection circuit configured to detect thevalue of the current flowing through inductor L1.

The value of the current detected by the current detection circuitpasses through low-pass filter 15. Low-pass filter 15 can be configuredby a general RC filter circuit. The method of setting cutoff frequencyfc of the RC filter circuit will be described later.

Overcurrent detection circuit 16 compares the detection value that haspassed through low-pass filter 15 with overcurrent protection thresholdTHocp, and activates the protection of inductor L1 when the detectionvalue that has passed through low-pass filter 15 exceeds overcurrentprotection threshold THocp.

Overcurrent detection circuit 16 can be composed of an absolute valuecircuit and a comparator. The absolute value circuit converts thedetection value that has passed through low-pass filter 15 into anabsolute value to output it to the comparator. Since the current flowsin both directions through inductor L1, the polarity of the currentdetection value is unified by providing an absolute value circuit infront of the comparator.

Further, overcurrent detection circuit 16 may be composed of a positiveside comparator that detects a positive overcurrent and a negative sidecomparator that detects a negative overcurrent. The outputs of thepositive and negative comparators are connected by a diode OR circuit,and when an overcurrent is detected by either the positive or negativecomparator, the protection of inductor L1 is activated.

Further, overcurrent detection circuit 16 may be configured by acomparator capable of switching between positive overcurrent protectionthreshold THocp+ and negative overcurrent protection threshold THocp-.Controller 13 controls the direction of the current flowing throughinductor L1 by controlling the on/off of first clamp switch Sc1 to thefourth clamp switch Sc4. Controller 13 notifies overcurrent detectioncircuit 16 of the direction of the current flowing through inductor L1,and overcurrent detection circuit 16 switches between positiveovercurrent protection threshold THocp+ and negative overcurrentprotection threshold THocp− depending on the direction of the currentflowing through inductor L1. In this case, the absolute value circuitcan be omitted.

There are two methods to protect inductor L1 when overcurrent isdetected. The first method is to stop the operation of equalizingcircuit 10. Overcurrent detection circuit 16 outputs an abnormality stopsignal when an overcurrent is detected. The abnormality stop signal isoutput to the control terminals of first clamp switch Sc1 to fourthclamp switch Sc4 and first clamp switch Sc1 to fourth clamp switch Sc4are turned off when the abnormality stop signal is received. Theabnormality stop signal is also output to controller 13, and whencontroller 13 receives the abnormality stop signal, the operation ofequalizing circuit 10 is stopped.

The second method is a method of continuing the operation of equalizingcircuit 10 while blocking the current flowing into inductor L1.Overcurrent detection circuit 16 outputs an abnormality signal tocontroller 13 when an overcurrent is detected. Upon receiving theabnormality signal, controller 13 immediately transitions equalizingcircuit 10 to the clamp state. As described above, in the clamp state,the n cells and inductor L1 are electrically cut off, so that thecurrent discharged from the cells is prevented from flowing intoinductor L1. After that, controller 13 returns to normal control. Whenthe overcurrent is detected a plurality of times within a predeterminedtime, controller 13 may stop the operation of equalizing circuit 10instead of transitioning it to the clamp state.

Whether to adopt the first method or the second method depends on theapplication of equalizing circuit 10. The first method is used for theapplication where safety is important, and the second method is used forthe application where continuity of operation is important.

FIG. 2 is a diagram showing the configuration example 2 of power storagesystem 1 according to the first exemplary embodiment. The configurationexample 2 shown in FIG. 2 is different from the configuration example 1shown in FIG. 1 in the configuration of the overcurrent detector. In theconfiguration example 2, Hall element Hs is included instead of shuntresistor Rs. Hall element Hs generates a voltage corresponding to thecurrent flowing through inductor L1 by applying a ground in the verticaldirection to the current flowing through inductor L1. Subsequentconfigurations are the same as the configuration example 1.

FIG. 3(a) to FIG. 3(h) are circuit diagrams for explaining a basicoperation sequence example of the equalizing process of power storagesystem 1 according to the first exemplary embodiment. In the presentbasic operation sequence example, the number of series connections ofcells is set to two for the sake of simplicity of explanation. In afirst state shown in FIG. 3(a), controller 13 controls first switch S1,first clamp switch Sc1, fourth clamp switch Sc4, and fourth switch S4 toa conducting state, and controls fifth switch S5, second clamp switchSc2, and third clamp switch Sc3 to a non-conducting state to create adischarge path. In this discharge state, a current flows from first cellC1 to inductor L1, and the energy discharged from first cell C1 isstored in inductor L1.

In a second state shown in FIG. 3(b), controller 13 controls secondclamp switch Sc2 and fourth clamp switch Sc4 to a conducting state, andcontrols first switch S1, fourth switch S4, fifth switch S5, first clampswitch Sc1, and third clamp switch Sc3 to a non-conducting state tocreate a clamp path. In this clamp state, the energy stored in inductorL1 flows as the inductor current in the closed loop and is activelyclamped.

In a third state shown in FIG. 3(c), controller 13 controls fourth clampswitch Sc4, fourth switch S4, fifth switch S5, and first clamp switchSc1 to a conducting state, and controls first switch S1, second clampswitch Sc2, and third clamp switch Sc3 to a non-conducting state tocreate a charge path. In this charge state, the inductor currentactively clamped in the closed loop flows to second cell C2 to chargesecond cell C2.

In a fourth state shown in FIG. 3(d), controller 13 controls firstswitch S1, fourth switch S4, fifth switch S5, and first clamp switch Sc1to fourth clamp switch Sc4 to a non-conducting state. In this state, theenergy transfer from first cell C1 to second cell C2 is completed. Thedescription performed so far is the description of a mode in which thecurrent of inductor L1 is not inverted (a mode in which the current isnot commutated). When the discharge from second cell C2 is startedsimultaneously with the completion of the charge of second cell C2(commutation mode), the fourth state shown in FIG. 3(d) is omitted. Thecurrent of inductor L1 is zero at the moment of commutation, and thestate is changed from FIG. 3(c) to FIG. 3(e) in which the current ofinductor L1 is inverted.

In a fifth state shown in FIG. 3(e), controller 13 controls fourthswitch S4, second clamp switch Sc2, third clamp switch Sc3, and fifthswitch S5 to a conducting state, and controls first switch S1, firstclamp switch Sc1, and fourth clamp switch Sc4 to a non-conducting stateto create a discharge path. In this discharge state, a current flowsfrom second cell C2 to inductor L1, and the energy discharged fromsecond cell C2 is stored in inductor L1.

In a sixth state shown in FIG. 3(f), controller 13 controls first clampswitch Sc1 and third clamp switch Sc3 to a conducting state, andcontrols first switch S1, fourth switch S4, fifth switch S5, secondclamp switch Sc2, and third clamp switch Sc3 to a non-conducting stateto create a clamp path. In this clamp state, the energy stored ininductor L1 flows as the inductor current in the closed loop and isactively clamped.

In a seventh state shown in FIG. 3(g), controller 13 controls thirdclamp switch Sc3, first switch S1, fourth switch S4, and second clampswitch Sc2 to a conducting state, and controls fifth switch S5, firstclamp switch Sc1, and fourth clamp switch Sc4 to a non-conducting stateto create a charge path. In this charge state, the inductor currentactively clamped in the closed loop flows to first cell C1 to chargefirst cell C1.

In an eighth state shown in FIG. 3(h), controller 13 controls firstswitch S1, fourth switch S4, fifth switch S5, and first clamp switch Sc1to fourth clamp switch Sc4 to a non-conducting state. In this state, theenergy transfer from second cell C2 to first cell C1 is completed.

In the second state or sixth state, the inductor current is activelyclamped in the closed loop to ensure the continuity of the inductorcurrent, which enables safe and reliable switch switching of cellselection circuit 11.

FIG. 4(a) to FIG. 4(c) are diagrams for showing a specific example ofthe equalizing process of power storage system 1 according to the firstexemplary embodiment. In this specific example, an example in which fourcells C1 to C4 are connected in series is assumed. FIG. 4(a) is adiagram schematically showing voltage states of first cell C1 to fourthcell C4 before start of the equalizing process. Controller 13 calculatesan average value of voltages of first cell C1 to fourth cell C4 detectedby voltage detector 14, and sets the calculated average value as anequalization target voltage (hereinafter, simply referred to as a targetvoltage).

Controller 13 transfers energy from a cell with a voltage higher thanthe target voltage to a cell with a voltage lower than the targetvoltage. For example, energy is transferred from a cell with a highestvoltage among cells with voltages higher than the target voltage (firstcell C1 in FIG. 4(a)) to a cell with a lowest voltage among cells withvoltages lower than the target voltage (fourth cell C4 in FIG. 4(a)).

Controller 13 determines an energy transfer amount within a range inwhich a transfer source cell (cell to be discharged) has a voltage equalto or higher than the target voltage and a transfer destination cell(cell to be charged) has a voltage less than or equal to the targetvoltage. Controller 13 determines a discharge time of the transfersource cell and a charge time of the transfer destination cell based onthe determined energy transfer amount and a discharge current and acharge current based on the design. Assuming that an energy amountconsumed while the inductor current is actively clamped in energyretaining circuit 12 can be ignored, the discharge time of the transfersource cell is basically equal to the charge time of the transferdestination cell.

FIG. 4(b) illustrates a state where energy transfer from first cell C1being the transfer source cell to fourth cell C4 being the transferdestination cell is completed. Controller 13 executes theabove-described processing again. Specifically, energy is transferredfrom the cell with the highest voltage among cells with the voltagehigher than the target voltage (third cell C3 in FIG. 4(b)) to the cellwith the lowest voltage among cells with the voltage lower than thetarget voltage (second cell C2 in FIG. 4(b)).

FIG. 4(c) illustrates a state where energy transfer from third cell C3being the source cell to second cell C2 being the destination cell iscompleted. As described above, the equalizing process of first cell C1to fourth cell C4 connected in series is completed.

In the specific example shown in FIG. 4(a) to FIG. 4(c), first, theaverage value of the voltages of the plurality of cells connected inseries is calculated, and the target value is set. In this regard, analgorithm without setting the target value is also available. At eachtime point, controller 13 transfers energy from the cell with thehighest voltage among voltages of the plurality of cells connected inseries to the cell with the lowest voltage to equalize voltages of thetwo cells. Controller 13 repeatedly executes this processing until thevoltages of the plurality of cells connected in series are allequalized.

Further, in the above specific example, although the example of using avoltage as the equalization target value is described, an actualcapacity, a dischargeable capacity, or a rechargeable capacity may beused instead of the voltage.

FIG. 5 is a diagram showing the configuration example 1 of power storagesystem 1 according to a second exemplary embodiment. In the secondexemplary embodiment, cell selection circuit 11 includes first wiring W1connected to a first end of inductor L1, second wiring W2 connected to asecond end of inductor L1, (n+1) first wiring side switches, and (n+1)second wiring side switches. The (n+1) first wiring side switches areconnected between the respective nodes of the n cells connected inseries and first wiring W1. The (n+1) second wiring side switches areconnected between respective nodes of the n cells connected in seriesand second wiring W2.

Energy retaining circuit 12 (also referred to as a clamp circuit)includes inductor L1 and clamp switch Sc. Clamp switch Sc is a switchfor electrically connecting both ends of inductor L1 in energy retainingcircuit 12. Energy retaining circuit 12 can form a closed loop includinginductor L1 in a state where cell selection circuit 11 does not selectany cells. That is, when clamp switch Sc is controlled to an ON state, aclosed loop including inductor L1 and clamp switch Sc, that is, a clamppath is formed. In the second exemplary embodiment, paths (dischargepath and charge path) through which energy is transferred between theselected cell and inductor L1 are formed by one predetermined firstwiring side switch and one predetermined second wiring side switch.However, since energy retaining circuit 12 does not have a function ofswitching a direction of a current flowing through inductor L1, thedischarge path and the charge path are formed by selecting the firstwiring side switch and the second wiring side switch for switching thestate to the conducting state according to the direction of the currentflowing through inductor L1.

When transferring energy between cells, controller 13 controls clampswitch Sc1 to be in a conducting state, and also controls cell selectioncircuit 11 to conduct both ends of the cell to be discharged among the ncells and both ends of inductor L1 for a predetermined time to create adischarge path. In a state where the discharge path is created, acurrent flows between the cell to be discharged and inductor L1, and astate where a current flows from the cell to be discharged to inductorL1 (also referred to as an inductor increase state) occurs, and energyis stored in inductor L1.

Next, controller 13 controls cell selection circuit 11 to electricallycut off the n cells and inductor L1 and controls clamp switch Sc to bein a conducting state to create a clamp path. In this clamp state, acirculating current flows through the closed loop, and an inductorcurrent is actively clamped in energy retaining circuit 12.

Next, controller 13 controls clamp switch Sc in a conducting state andcontrols cell selection circuit 11 to electrically connect both ends ofa cell to be charged among the n cells and both ends of inductor L1 fora predetermined time to create a charge path. In a state where thecharge path is created, a current flows between the cell to be chargedand inductor L1, and a state where an inductor current actively clampedin energy retaining circuit 12 flows in the cell to be charged (alsoreferred to as an inductor current reduction state) occurs. Accordingly,the energy transfer from one cell to another is completed.

The configuration of the overcurrent protection unit is the same as theconfiguration example 1 of the first exemplary embodiment shown in FIG.1.

FIG. 6 is a diagram showing the configuration example 2 of power storagesystem 1 according to the second exemplary embodiment. The configurationexample 2 shown in FIG. 6 differs from the configuration example 1 shownin FIG. 5 in the configuration of the overcurrent detector. In theconfiguration example 2, Hall element Hs is included instead of shuntresistor Rs. Hall element Hs generates a voltage corresponding to thecurrent flowing through inductor L1 by applying a ground in the verticaldirection to the current flowing through inductor L1. Subsequentconfigurations are the same as the configuration example 1.

FIG. 7 is a diagram illustrating the configuration example of powerstorage system 1 according to the comparative example. In thecomparative example, power storage 20 includes two cells C1, C2connected in series. In the comparative example, the energy transfer oftwo cells C1, C2 can be achieved only by providing two switches S1 andS5. In the comparative example, the state of clamping the current doesnot occur.

Hereinafter, cutoff frequency fc of low-pass filter 15 will bedescribed. Cutoff frequency fc (=½πτ) of low-pass filter 15 has a uniquerelationship with time constant τ (=RC) of low-pass filter 15.

FIG. 8(a) to FIG. 8(h) are diagrams in which a schematic waveforms ofthe inductor current input to the overcurrent detection circuit 16according to the comparative example, and a schematic waveform of theinductor current input to the overcurrent detection circuit 16 accordingto the first exemplary embodiment and the second exemplary embodimentare compared. FIG. 8(a) to FIG. 8(d) show a schematic waveform of theinductor current input to overcurrent detection circuit 16 according tothe comparative example. When the inductor current switches from anincrease to a decrease due to the turn-off of the switch provided on thepath connecting the discharge cell and inductor L1, the high frequencyringing noise is generated due to the parasitic capacitance and theparasitic inductance of the substrate.

The current waveform shown in FIG. 8(a) shows a current waveform when itdoes not pass through low-pass filter 15. The ringing noise issuperimposed on the peak of the current waveform. The current waveformshown in FIG. 8(b) shows a current waveform that has passed throughlow-pass filter 15 in which cutoff frequency fc is set to a high value.The current waveform shown in FIG. 8(c) shows a current waveform thathas passed through low-pass filter 15 in which cutoff frequency fc isset to a medium value. The current waveform shown in FIG. 8(d) shows acurrent waveform that has passed through low-pass filter 15 in whichcutoff frequency fc is set to a low value.

In the current waveform shown in FIG. 8(d), since cutoff frequency fc isset to a low value, the ringing noise generated at the peak of thecurrent waveform is removed. However, since the current waveform itselfto be detected also becomes blunt, it is not possible to accuratelygrasp the true peak value. When overcurrent protection threshold THocpis set near the peak of the current waveform blunted by low-pass filter15, the deviation between the true peak value and overcurrent protectionthreshold THocp is large.

On the other hand, when cutoff frequency fc is set to a high value asshown in the current waveform shown in FIG. 8(b), the ringing noise isnot completely removed, and the current in the normal range due to theinstantaneous ringing noise may be falsely detected as an overcurrent.In order to prevent this false detection, it is necessary to set cutofffrequency fc to a low value as shown in the current waveform shown inFIG. 8(d), but the lower cutoff frequency fc is set, the larger thewasteful design margin is. Overcurrent protection will be activated whenthere is the surplus for the capacity in which inductor L1 passescurrent, so that inductor L1 will not be able to fully demonstrate itscapacity. In other word, inductor L1 and other elements that haveexcessive capacities for the originally required capacity are used, andequalizing circuit 10 is large and costly. Specifically, increasing thesize of inductor L1 leads to increasing the size of entire equalizingcircuit 10.

FIG. 8(e) to FIG. 8(h) show a schematic waveform showing an inductorcurrent input to overcurrent detection circuit 16 according to the firstexemplary embodiment and the second exemplary embodiment. In the firstexemplary embodiment and the second exemplary embodiment, the inductorcurrent is clamped near the peak value by energy retaining circuit 12without decreasing immediately after the inductor current reaches thepeak value. In order to prevent the false detection, as shown in FIG.8(h), even when low-pass filter 15 with cutoff frequency fc withsufficiently suppressed ringing noise is used as shown in the currentwaveform, appropriate overcurrent protection can be applied. That is,since the peak value is clamped by energy retaining circuit 12, the peakvalue of the inductor current in which ringing noise is suppressed canbe compared with overcurrent protection threshold THocp, and appropriateovercurrent protection can be applied.

In the first exemplary embodiment and the second exemplary embodiment,since the peak value of the inductor current can be maintained for acertain period of time, it is not necessary to set the time constant oflow-pass filter 15 excessively, and the time constant can be set to theoptimal value. Further, since the deviation between the true peak valueand overcurrent protection threshold THocp is small, the design margincan be reduced, and equalizing circuit 10 can be prevented from becomingunnecessarily large and costly.

FIG. 9(a) to FIG. 9(c) are diagrams showing an example of the detectionwaveform of the inductor current according to the comparative example.FIG. 9(a) shows a current waveform in which the ringing noise is notsuperimposed, FIG. 9(b) shows a current waveform in which the ringingnoise is superimposed, and FIG. 9(c) shows a current waveform afterpassing through low-pass filter 15. When ringing noise is superimposedas shown in FIG. 9(b), even when the inductor current itself is withinthe normal range, it is falsely detected as an overcurrent. As shown inFIG. 9(c), when low-pass filter 15 in which cutoff frequency fc is setto a low value is provided, the deviation between the true peak value ofthe inductor current and overcurrent protection threshold THocp islarge, so that the wasteful design margin is generated. Specifically,inductor L1 is unnecessarily large.

FIG. 10(a) to FIG. 10(c) are diagrams showing an example of thedetection waveform of the inductor current according to the firstexemplary embodiment and the second exemplary embodiment. FIG. 10(a)shows a current waveform in which ringing noise is not superimposed,FIG. 10(b) shows a current waveform in which ringing noise issuperimposed, and FIG. 10(c) shows a current waveform after passingthrough low-pass filter 15. In the first exemplary embodiment and thesecond exemplary embodiment, as shown in FIG. 10(c), even when low-passfilter 15 in which cutoff frequency fc is set to a low value isprovided, the deviation between the true peak value of the inductorcurrent and overcurrent protection threshold THocp is small, so that thedesign margin is optimized. Specifically, it is possible to preventinductor L1 from becoming unnecessarily large.

An example of setting cutoff frequency fc of low-pass filter 15 will bedescribed below. Cutoff frequency fc of low-pass filter 15 is requiredto be set to a value which allows the suppression of the inductorcurrent itself to be small while suppressing the ringing noise.

Hereinafter, the experimental results observed by an oscilloscope aftermeasuring both ends of shunt resistor Rs with a current probe whilechanging cutoff frequency fc of low-pass filter 15 are shown. Themeasurement is performed with the resistance value of shunt resistor Rsof 1Ω, and drive frequency fsw of clamp switch Sc of 300 kHz.

FIG. 11(a) to FIG. 11(b) are diagrams showing a detection waveform of aninductor current that has not passed through low-pass filter 15 and adetection waveform of an inductor current that has passed throughlow-pass filter 15 with cutoff frequency fc set to 20 MHz. FIG. 12(a) toFIG. 12(b) are diagrams showing a detection waveform of an inductorcurrent that passed through low-pass filter 15 with cutoff frequency fcset to 8 MHz and a detection waveform of an inductor current that passedthrough low-pass filter 15 with cutoff frequency fc set to 4 MHz. FIG.13(a) to FIG. 13(b) are diagrams showing a detection waveform of aninductor current that passed through low-pass filter 15 with cutofffrequency fc set to 2 MHz and a detection waveform of an inductorcurrent that passed through low-pass filter 15 with cutoff frequency fcset to 1 MHz. FIG. 14 is a diagram showing a detection waveform of aninductor current that has passed through low-pass filter 15 with cutofffrequency fc set to 0.5 MHz.

Of these current waveforms, the current detection waveform shown in FIG.12(b) and the current detection waveform shown in FIG. 13(a) can be saidto be current waveforms which allows the suppression of the inductorcurrent itself to be small while suppressing the ringing noise. Whenusing low-pass filter 15 with cutoff frequency fc=3 MHz between cutofffrequency fc=4 MHz in FIG. 12(b) and cutoff frequency fc=2 MHz in FIG.13(a), the relationship between drive frequency fsw of clamp switch Scand cutoff frequency fc of low-pass filter 15 is as follows (Equation1).

fsw:fc=300 kHz:3 MHz=1:10  (Equation 1)

Based on the above experimental results, when cutoff frequency fc oflow-pass filter 15 is set to 10 times or more of drive frequency fsw ofclamp switch Sc, a desirable current waveform that allows thesuppression of the inductor current itself to be small while suppressingthe ringing noise is obtained. The magnification of cutoff frequency fcof low-pass filter 15 with respect to drive frequency fsw of clampswitch Sc is preferably set to 10 times or more, but is not limited tothis, and may be set to be more than or equal to a predeterminedmultiple at least greater than one in some cases, and may be setaccording to the effect of suppressing the ringing noise and the degreeof suppression of the inductor current.

Next, the experimental results of observing the simulated waveform ofthe ringing noise generated by a waveform generator with an oscilloscopewhile changing cutoff frequency fc of low-pass filter 15 are shown. Inthis experiment, a simulated waveform of the ringing noise with ringingfrequency fr=1.25 MHz is used.

FIG. 15(a) to FIG. 15(b) are diagrams showing a detection waveform of aringing noise that has not passed through low-pass filter 15 and adetection waveform of a ringing noise that has passed through low-passfilter 15 with cutoff frequency fc set to 20 MHz. FIG. 16(a) to FIG.16(b) diagrams showing a detection waveform of a ringing noise thatpassed through low-pass filter 15 with cutoff frequency fc set to 2 MHzand a detection waveform of a ringing noise that passed through low-passfilter 15 with cutoff frequency fc set to 1 MHz. FIG. 17(a) to FIG.17(b) diagrams showing a detection waveform of a ringing noise thatpassed through low-pass filter 15 with cutoff frequency fc set to 0.5MHz and a detection waveform of a ringing noise that passed throughlow-pass filter 15 with cutoff frequency fc set to 0.25 MHz. FIG. 18 isa diagram showing a detection waveform of a ringing noise that haspassed through low-pass filter 15 with cutoff frequency fc set to 0.125MHz.

When the relationship between ringing frequency fr and cutoff frequencyfc is 1:1, the amount of attenuation of low-pass filter 15 is −3 dB(1/√2). When the relationship between ringing frequency fr and cutofffrequency fc is 10:1, the amount of attenuation of low-pass filter 15 is−20 dB ( 1/10). When the relationship between ringing frequency fr andcutoff frequency fc is 100:1, the amount of attenuation of low-passfilter 15 is −40 dB ( 1/100).

The ringing noise does not necessarily have to be completely eliminated,and may be suppressed to a negligible level in the detection of theinductor current. In the detection waveform shown in FIG. 18, it can besaid that the ringing noise is suppressed to a negligible level. Fromthe above experimental results, as shown in the following (Equation 2),when cutoff frequency fc of low-pass filter 15 is set to 1/10 or less ofringing frequency fr, the ringing noise can be suppressed to anegligible level. The magnification of cutoff frequency fc of low-passfilter 15 with respect to ringing frequency fr is preferably set to 1/10or less, but is not limited to this, and may be set to less than orequal to a predetermined multiple at least less than one in some cases,and may be set according to the effect of suppressing the ringing noiseand the degree of suppression of the inductor current.

fr:fc=1.25 MHz:0.125 MHz=10:1  (Equation 2)

Further, in the first exemplary embodiment and the second exemplaryembodiment described above, an example of equalizing a plurality ofcells connected in series by an active method is described. In thisregard, the equalizing circuit according to the first exemplaryembodiment and the second exemplary embodiment can be used to equalize aplurality of modules connected in series. In this case, “cell” in thedescription of the first exemplary embodiment and the second exemplaryembodiment may be appropriately read as “module”.

FIG. 19 is a diagram showing a configuration of power storage system 1Maccording to a third exemplary embodiment. FIG. 19 shows power storagesystem 1M including an equalizing circuit that executes an equalizingprocess on a plurality of modules connected in series. In FIG. 19, eachof the plurality of modules includes a cell equalizing circuit and apower storage in which a plurality of cells is connected in series, asin power storage system 1 shown in FIG. 1. First module M1 includes cellequalizing circuit 10A and power storage 20A, second module M2 includescell equalizing circuit 10B and power storage 20B, third module M3includes cell equalizing circuit 10C and power storage 20C, and fourthmodule M4 includes cell equalizing circuit 10D and power storage 20D.

Module equalizing circuit 10M includes voltage detector 14M, moduleselection circuit 11M, energy retaining circuit 12M, and controller 13M.

In the present exemplary embodiment, controller 13M executes anequalizing process on m modules connected in series by an active modulebalance method. In the active module balance method according to thepresent exemplary embodiment, energy is transferred from one module(module to be discharged) to another module (module to be charged) amongm modules connected in series, thereby equalizing the capacities betweenone module and the other module. Repeating this energy transferequalizes the capacities of the m modules connected in series.

In addition to the above equalizing process on the plurality of modules,the equalizing process for the plurality of cells connected in series ineach module is executed. The equalizing process on the plurality ofcells connected in series in each module may be executed in amultiplexed manner with the equalizing process for the plurality ofmodules. In this case, module equalizing circuit 10M and cell equalizingcircuits 10A to 10D are operated in cooperation with each other bycommunication. The equalizing process on the modules is preferablyexecuted with priority over the equalizing process on the cells, andafter the equalizing process on the modules is completed, the equalizingprocess for the cells is completed, and thereby it is possible toeliminate the voltage difference between the cells generated byexecuting the equalizing process on the modules.

The configuration of the overcurrent protection unit is the same as theconfiguration example 1 of the first exemplary embodiment shown in FIG.1.

As described above, according to the first to third exemplaryembodiments, it is possible to suppress the high frequency noiseincluded in the detection waveform of the inductor current and achievehighly accurate overcurrent protection at an appropriate circuit scaleand cost. Since the presence or absence of overcurrent is detected inthe flat portion of the current waveform when the inductor current isclamped, cutoff frequency fc of low-pass filter 15 can be set to anappropriate value. This eliminates the need for a design with anexcessive margin, and makes it possible to optimize the circuit scaleand cost of equalizing circuit 10. Excessive specifications ofcomponents such as inductors, switches, and cells can be prevented.Moreover, since it is only necessary to optimize the time constant ofthe low-pass filter of a general overcurrent protection circuit, nospecial additional component is required.

The present disclosure is described above based on the exemplaryembodiments. The exemplary embodiments are exemplified, and it is easilyunderstood by the person of ordinary skill in the art that variousmodified examples are available for combinations of each ofconfiguration elements of the examples and each of processing processthereof, and that such modified examples are also within the scope ofthe present disclosure.

In the above-described first to third exemplary embodiments, theequalizing circuit of the active cell balance method is described, butit can also be applied to energy transfer not intended for equalizationbetween the plurality of cells or modules. For example, whentemperatures of two modules are significantly different, at least aportion of the energy of a module having a high temperature may betransferred to a module having a low temperature in order to reducestorage degradation.

In the above-described first to third exemplary embodiments, the energytransfer from one cell to another cell is described, but energy transferfrom a plurality of cells connected in series to a plurality of cellsconnected in series can also be executed. Energy transfer from one cellto a plurality of cells connected in series and energy from a pluralityof cells connected in series to another cell can also be executed. Thesame applies to the modules.

Note that the exemplary embodiments may be specified by the followingitems.

[Item 1] Energy transfer circuit (10) including inductor (L1), cellselection circuit (11) provided between n cells (C1 to C4) connected inseries, where n is an integer of 2 or more, and inductor (L1) andcapable of conducting both ends of a selected cell including any one ofn cells (C1 to C4) or a plurality of cells connected in series, and bothends of inductor (L1), clamp circuit (12) having at clamp switch (Sc1 toSc4, or Sc) for forming a closed loop including inductor (L1) with cellselection circuit (11) not selecting any cells (C1 to C4), currentdetection circuit (Rs and AP1, or Hs and AP1) configured to detect avalue of a current flowing through inductor (L1), low-pass filter (15)configured to band-limit a detection value detected by current detectioncircuit (Rs and AP1, or Hs and AP1), and overcurrent detection circuit(16) configured to activate protection of inductor (L1) when a detectionvalue band-limited by low-pass filter (15) exceeds a threshold.

According to this, highly accurate overcurrent protection can beachieved with an appropriate circuit scale and cost.

[Item 2] Energy transfer circuit (10) according to item 1, furtherincluding controller (13) configured to control cell selection circuit(11) and clamp circuit (12), wherein controller (13) controls aninductor current increase state in which a discharge path in which bothends of inductor (L1) are connected to nodes on both sides of dischargecell (C1) is formed, a current flowing from discharge cell (C1) which isthe selected cell to be discharged among n cells (C1 to C4) to inductor(L1), and a current flowing through inductor (L1) is increased, a clampstate in which a clamp path in which both ends of inductor (L1) areconnected to via clamp switch (Sc1, Sc4) is created, a clamp currentflowing between both ends of inductor (L1), and a current flowingthrough inductor (L1) is circulated in the clamp path, and an inductorcurrent reduction state in which a charge path in which both ends ofinductor (L1) are connected to nodes on both sides of charge cell (C2)is created, a current flowing from inductor (L1) to charge cell (C2)which is the selected cell to be charged among n cells (C1 to C4), and acurrent flowing through inductor (L1) is reduced in this order.

According to this, it is possible to achieve highly sensitiveovercurrent detection by utilizing the clamp state.

[Item 3] Energy transfer circuit (10) according to item 2, whereinovercurrent detection circuit (16) instructs controller (13) totransition a state to the clamp state when the detection value exceedsthe threshold.

According to this, it is possible to prevent saturation of inductor (L1)while continuing the operation of energy transfer circuit (10).

[Item 4] Energy transfer circuit (10) according to item 1 or 2, whereinovercurrent detection circuit (16) controls at least one clamp switch(Sc1 to Sc4, or Sc) to an OFF state when the detection value exceeds thethreshold.

According to this, the saturation of inductor (L1) can be prevented bystopping the operation of energy transfer circuit (10).

[Item 5] Energy transfer circuit (10) according to any one of items 1 to4, wherein cell selection circuit (11) includes first wiring (W1)connected to one end of inductor (L1), second wiring (W2) connected tothe other end of inductor (L1), (n+1) first wiring side switches (S1,S3, S5, S7, S9) that selectively connect one of both ends of theselected cell to first wiring (W1), and (n+1) second wiring sideswitches (S2, S4, S6, S8, S10) that selectively connect the other ofboth ends of the selected cell to second wiring (W2), and wherein clampcircuit (12) includes one clamp switch (Sc).

Accordingly, it is possible to constitute one clamp switch (Sc) used forclamp circuit (12).

[Item 6] Energy transfer circuit (10) according to any one of items 1 to4, wherein cell selection circuit (11) includes first wiring (W1)connected to one end of inductor (L1), second wiring (W2) connected tothe other end of inductor (L1), a plurality of first wiring sideswitches (S1, S5, S9) that is connected between odd-numbered nodes among(n+1) nodes of n cells (C1 to C4) connected in series and first wiring(W1), and at least one second wiring side switch (S4, S8) that isconnected between even-numbered nodes among the (n+1) nodes of n cells(C1 to C4) connected in series and second wiring (W2), wherein clampcircuit (12) includes first clamp switch (Sc1) and second clamp switch(Sc2) connected to each other in series and third clamp switch (Sc3) andfourth clamp switch (Sc4) connected to each other in series, whereininductor (L1) is connected between a node between first clamp switch(Sc1) and second clamp switch (Sc2) and a node between third clampswitch (Sc3) and fourth clamp switch (Sc4), wherein one end, of each offirst clamp switch (Sc1) and third clamp switch (Sc3), that is notconnected to inductor (L1) is connected to first wiring (W1), whereinone end, of each of second clamp switch (Sc2) and fourth clamp switch(Sc4), that is not connected to inductor (L1) is connected to secondwiring (W2), and wherein clamp circuit (12) is connected as a fullbridge circuit by inductor (L1), first clamp switch (Sc1), second clampswitch (Sc2), third clamp switch (Sc3), and fourth clamp switch (Sc4).

According to this, it is possible to reduce the number of first wiringside switches (S1, S5, S9) and second wiring side switches (S4, S8).

[Item 7] Energy transfer circuit (10) according to any one of items 1 to6, wherein a cutoff frequency of low-pass filter (15) is set to morethan or equal to a predetermined multiple greater than one (for example,about 10 times) of a drive frequency of at least one clamp switch (Sc1to Sc4, or Sc).

According to this, the ringing noise can be suppressed withoutsuppressing the inductor current itself.

[Item 8] Energy transfer circuit (10) according to any one of items 1 to7, wherein a cutoff frequency of low-pass filter (15) is set to lessthan or equal to a predetermined multiple less than one (for example,about 1/10 times) of a frequency of a ringing noise superimposed on acurrent flowing through inductor (L1).

According to this, the ringing noise can be suppressed withoutsuppressing the inductor current itself.

[Item 9] Energy transfer circuit (10) according to item 2, furtherincluding voltage detector (14) configured to detect voltages of n cells(C1 to C4), wherein controller (13) executes an equalizing process on ncells (C1 to C4) based on voltages of n cells (C1 to C4) detected byvoltage detector (14).

Accordingly, it is possible to achieve the equalizing circuit using theenergy transfer.

[Item 10] Energy transfer circuit (10) according to item 9, whereincontroller (13) determines a target voltage or a target capacity of ncells (C1 to C4) based on voltages of n cells (C1 to C4) detected byvoltage detector (14), determines that a cell with a voltage or acapacity higher than the target voltage or the target capacity is a cellto be discharged, and determines that a cell with a voltage or acapacity lower than the target voltage or the target capacity is a cellto be charged.

Accordingly, active cell balance can be achieved by energy transferbetween cells (C1 to C4).

[Item 11] Power storage system (1) including n cells (C1 to C4)connected in series, where n is an integer of 2 or more, and energytransfer circuit (10) according to any one of items 1 to 10.

According to this, it is possible to construct power storage system (1)that achieves highly accurate overcurrent protection at an appropriatecircuit scale and cost.

[Item 12] Energy transfer circuit (10M) including inductor (L1M), moduleselection circuit (11M) provided between m modules (M1 to M4) connectedin series, where m is an integer of 2 or more, and inductor (L1M) andcapable of conducting both ends of a selected module including any oneof m modules (M1 to M4) or a plurality of modules connected in series,and both ends of inductor (L1M), clamp circuit (12M) having clampswitches (Sc1M to Sc4M) for forming a closed loop including inductor(L1M) with module selection circuit (11M) not selecting any modules (M1to M4), current detection circuit (Rs and AP1) configured to detect avalue of a current flowing through inductor (L1M), low-pass filter (15)configured to band-limit a detection value detected by current detectioncircuit (Rs and AP1), and overcurrent detection circuit (16) configuredto activate protection of inductor (L1M) when a detection valueband-limited by low-pass filter (15) exceeds a threshold.

According to this, highly accurate overcurrent protection can beachieved with an appropriate circuit scale and cost.

[Item 13] Energy transfer circuit (10M) according to item 12, furtherincluding controller (13M) that controls module selection circuit (11M)and clamp circuit (12M), wherein each of m modules (M1 to M4) includes aplurality of cells (C1 to C4) connected in series, cell voltage detector(14) that detects cell voltages of the plurality of cells (C1 to C4),and cell equalizing circuits (10A to 10D) that equalize a plurality ofcell voltages within same modules (M1 to M4) based on the cell voltagesdetected by cell voltage detector (14), and wherein cell equalizingcircuits (10A to 10D) operate in cooperation with controller (13M) bycommunication, and execute an equalizing process on the plurality ofcells (C1 to C4) after an equalizing process on m modules (M1 to M4) isexecuted.

Accordingly, it is possible to efficiently achieve equalization on allcells by concurrently using active module balance by energy transferbetween modules (M1 to M4) and active cell balance by energy transferbetween cells (C1 to C4).

[Item 14] Power storage system (1M) including m modules (M1 to M4)connected in series, where m is an integer of 2 or more, and energytransfer circuit (10M) according to item 12 or 13.

According to this, it is possible to construct power storage system (1M)that achieves highly accurate overcurrent protection at an appropriatecircuit scale and cost.

REFERENCE MARKS IN THE DRAWINGS

-   -   1: power storage system    -   10: equalizing circuit    -   11: cell selection circuit    -   12: energy retaining circuit    -   13: controller    -   14: voltage detector    -   15: low-pass filter    -   16: overcurrent detection circuit    -   20: power storage    -   C1-C4: cell    -   L1: inductor    -   W1: first wiring    -   W2: second wiring    -   S1-S10: switch    -   Sc1-Sc4: clamp switch    -   Rs: shunt resistor    -   Hs: Hall element    -   AP1: differential amplifier

1. An energy transfer circuit comprising: an inductor; a cell selectioncircuit provided between the inductor and n cells connected in series,where n is an integer of 2 or more, the cell selection circuit beingconfigured to conduct between (i) both ends of a selected cell and (ii)both ends of the inductor, the selected cell being a least one cellselected from the n cells connected in series; a clamp circuit includingat least one clamp switch, the at least one clamp switch forming aclosed loop including the inductor in a state where the cell selectioncircuit does not select any cells; a current detection circuitconfigured to detect a value of a current flowing through the inductor;a low-pass filter configured to band-limit a detection value detected bythe current detection circuit; and an overcurrent detection circuitconfigured to activate protection of the inductor when the detectionvalue band-limited by the low-pass filter exceeds a threshold.
 2. Theenergy transfer circuit according to claim 1, further comprising acontroller configured to control the cell selection circuit and theclamp circuit, wherein the controller controls an inductor currentincrease state in which a discharge path in which the both ends of theinductor are connected to nodes on both sides of a discharge cell isformed to flow a current from the discharge cell to the inductor,thereby increasing the current flowing through the inductor, thedischarge cell being the selected cell to be discharged among the ncells, a clamp state in which a clamp path in which the both ends of theinductor are connected to each other via the at least one clamp switchis created, to flow a clamp current between the both ends of theinductor, thereby circulating, in the clamp path, the current flowingthrough the inductor, and an inductor current reduction state in which acharge path in which the both ends of the inductor are connected tonodes on both sides of a charge cell is created to flow current from theinductor to the charge cell, thereby reducing the current flowingthrough the inductor, the charge cell being the selected cell to becharged among the n cells, and the controller performs the control ofthe inductor current increase state, the control of the clamp state, andthe control of the inductor current reduction state in this order. 3.The energy transfer circuit according to claim 2, wherein theovercurrent detection circuit instructs the controller to transition astate to the clamp state when the detection value exceeds the threshold.4. The energy transfer circuit according to claim 1, wherein theovercurrent detection circuit controls the at least one clamp switch toan OFF state when the detection value exceeds the threshold.
 5. Theenergy transfer circuit according to claim 1, wherein the cell selectioncircuit includes first wiring connected to one end of the inductor,second wiring connected to another end of the inductor, (n+1) firstwiring switches that selectively connect one of both ends of theselected cell to the first wiring, and (n+1) second wiring switches thatselectively connect another of both ends of the selected cell to thesecond wiring, and the clamp circuit includes one of the at least oneclamp switch.
 6. The energy transfer circuit according to claim 1,wherein the cell selection circuit includes first wiring connected toone end of the inductor, second wiring connected to another end of theinductor, a plurality of first wiring switches that is connected betweenodd-numbered nodes among (n+1) nodes of the n cells connected in seriesand the first wiring, and at least one second wiring switch that isconnected between even-numbered nodes among the (n+1) nodes of the ncells connected in series and the second wiring, the clamp circuitincludes a first clamp switch and a second clamp switch connected toeach other in series and a third clamp switch and a fourth clamp switchconnected to each other in series, the inductor is connected between anode between the first clamp switch and the second clamp switch and anode between the third clamp switch and the fourth clamp switch, oneend, of each of the first clamp switch and the third clamp switch, thatis not connected to the inductor is connected to the first wiring, oneend, of each of the second clamp switch and the fourth clamp switch,that is not connected to the inductor is connected to the second wiring,and the clamp circuit is connected as a full bridge circuit by theinductor, the first clamp switch, the second clamp switch, the thirdclamp switch, and the fourth clamp switch.
 7. The energy transfercircuit according to claim 1, wherein a cutoff frequency of the low-passfilter is set to more than or equal to a predetermined multiple greaterthan one of a drive frequency of the at least one clamp switch.
 8. Theenergy transfer circuit according to claim 1, wherein the cutofffrequency of the low-pass filter is set to less than or equal to apredetermined multiple less than one of a frequency of a ringing noisesuperimposed on the current flowing through the inductor.
 9. The energytransfer circuit according to claim 2, further comprising a voltagedetector configured to detect respective voltages of the n cells,wherein the controller executes an equalizing process on the n cellsbased on the respective voltages of the n cells detected by the voltagedetector.
 10. The energy transfer circuit according to claim 9, whereinthe controller determines a target voltage or a target capacity of the ncells based on the respective voltages of the n cells detected by thevoltage detector, determines that a cell with a voltage or a capacityhigher than the target voltage or the target capacity is the dischargecell, and determines that a cell with a voltage or a capacity lower thanthe target voltage or the target capacity is the charge cell.
 11. Apower storage system comprising: the energy transfer circuit accordingto claim 1; and the n cells connected in series, where n is an integerof 2 or more.
 12. An energy transfer circuit comprising: an inductor; amodule selection circuit provided between m modules connected in series,where m is an integer of 2 or more, and the inductor and configured toconduct both ends of a selected module including any one of the mmodules or a plurality of modules connected in series, and both ends ofthe inductor; a clamp circuit including a clamp switch for forming aclosed loop including the inductor in a state where the module selectioncircuit not selecting any modules; a current detection circuitconfigured to detect a value of a current flowing through the inductor;a low-pass filter configured to band-limit a detection value detected bythe current detection circuit; and an overcurrent detection circuitconfigured to activate protection of the inductor when a detection valueband-limited by the low-pass filter exceeds a threshold.
 13. The energytransfer circuit according to claim 12, further comprising a controllerconfigured to control the module selection circuit and the clampcircuit, wherein each of the m modules includes a plurality of cellsconnected in series, a cell voltage detector configured to detectrespective cell voltages of the plurality of cells, and a cellequalizing circuit configured to equalize a plurality of cell voltageswithin a same module based on the respective cell voltages detected bythe cell voltage detector, and the cell equalizing circuit operates incooperation with the controller by communication, and executes anequalizing process on the plurality of cells after an equalizing processon the m modules is executed.
 14. A power storage system, comprising:the energy transfer circuit according to claim 12; and the m modulesconnected in series, where m is an integer of 2 or more.